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 AUTOMOTIVE MOSFET
PD - 95480
IRFP2907ZPBF
Features
l l l l l l
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = 75V RDS(on) = 4.5m
G S
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
ID = 90A
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS EAS (tested) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (See Fig. 9) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current
Max.
170 120 90 680 310 2.0 20 520 690 See Fig.12a,12b,15,16 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A
Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value Avalanche Current
W W/C V mJ A mJ C
i
d
Repetitive Avalanche Energy Operating Junction and Storage Temperature Range
h
Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw
Thermal Resistance
RJC RCS RJA Junction-to-Case
j
Parameter
Typ.
Max.
0.49 --- 40
Units
C/W
Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
j
jA
--- 0.24 ---
HEXFET(R) is a registered trademark of International Rectifier.
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1
7/16/04
IRFP2907ZPBF
Static @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS VDSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
75 --- --- 2.0 180 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.069 3.5 --- --- --- --- --- --- 180 46 65 19 140 97 100 5.0 13 7500 970 510 3640 650 1020 --- --- 4.5 4.0 --- 20 250 200 -200 270 --- --- --- --- --- --- --- --- --- --- --- --- --- --- pF
Conditions
V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 90A V VDS = VGS, ID = 250A S VDS = 25V, ID = 90A A VDS = 75V, VGS = 0V VDS = 75V, VGS = 0V, TJ = 125C nA VGS = 20V VGS = -20V ID = 90A nC VDS = 60V VGS = 10V ns VDD = 38V ID = 90A RG = 2.5 VGS = 10V D nH Between lead,
f
f f
6mm (0.25in.) from package
G
Diode Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
S and center of die contact VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 60V, = 1.0MHz VGS = 0V, VDS = 0V to 60V
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 41 59 90 A 680 1.3 61 89 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G D
p-n junction diode. TJ = 25C, IS = 90A, VGS = 0V TJ = 25C, IF = 90A, VDD = 38V di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
f
f
S
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L=0.13mH, RG = 25, IAS = 90A, VGS =10V. Part not recommended for use above this value. ISD 90A, di/dt 340A/s, VDD V(BR)DSS, TJ 175C. Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from 0 to 80% VDSS.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
R is measured at TJ of approximately 90C.
2
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IRFP2907ZPBF
10000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
1000
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
100 4.5V
10
4.5V
60s PULSE WIDTH
1 0.1 1 Tj = 25C 10 100 0.1 1 10
60s PULSE WIDTH
Tj = 175C 10
100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
Gfs, Forward Transconductance (S)
200 T J = 25C 150
ID, Drain-to-Source Current ()
100
T J = 175C
10
T J = 25C
100
T J = 175C
1 VDS = 25V 60s PULSE WIDTH 0.1 2 4 6 8 10
50 V DS = 10V 380s PULSE WIDTH 0 0 25 50 75 100 125 150 ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRFP2907ZPBF
100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd
12.0 ID= 90A
VGS, Gate-to-Source Voltage (V)
10.0 8.0 6.0 4.0 2.0 0.0
VDS= 60V VDS= 38V VDS= 15V
C, Capacitance(pF)
10000
Ciss Coss
1000
Crss
100 1 10 100
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD, Reverse Drain Current (A)
T J = 175C 100
ID, Drain-to-Source Current (A)
1000
100
100sec
10
TJ = 25C
10 1msec 1 Tc = 25C Tj = 175C Single Pulse 1 10 10msec
VGS = 0V 1 0.0 0.5 1.0 1.5 2.0 2.5 VSD, Source-to-Drain Voltage (V)
0.1 100 1000 VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP2907ZPBF
175 150
ID, Drain Current (A)
2.5
Limited By Package
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 90A VGS = 10V
2.0
125 100 75 50 25 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20 0.10 0.05
0.01
0.02 0.01
J
R1 R1 J 1 2
R2 R2
R3 R3 3 C 3
Ri (C/W) 0.1224 0.1238 0.2433
i (sec) 0.000360 0.001463 0.021388
1
2
0.001
SINGLE PULSE ( THERMAL RESPONSE )
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.001 0.01 0.1 1
0.0001 1E-006 1E-005 0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFP2907ZPBF
2500
EAS , Single Pulse Avalanche Energy (mJ)
15V
2000
VDS
L
DRIVER
ID 16A 25A BOTTOM 90A TOP
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
1500
A
0.01
1000
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
500
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS VG
VGS(th) Gate threshold Voltage (V)
3.5
QGD
4.0
Charge
3.0
Fig 13a. Basic Gate Charge Waveform
2.5
ID = 250A
2.0
1.5
L
0
DUT 1K
VCC
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRFP2907ZPBF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
0.01 0.05
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
0.10
1 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
600
EAR , Avalanche Energy (mJ)
500
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 90A
400
300
200
100
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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7
IRFP2907ZPBF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* dv/dt controlled by RG * Driver same type as D.U.T. * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
*
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V DS V GS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
-V DD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFP2907ZPBF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
TO-247AC Part Marking Information
EXAMPLE: T HIS IS AN IRFPE30 WIT H ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2000 IN THE AS SEMBLY LINE "H"
Note: "P" in assembly line position indicates "Lead-Free"
INT ERNATIONAL RECT IFIER LOGO ASSEMBLY LOT CODE
PART NUMBER
IRFPE30
56 035H 57
DAT E CODE YEAR 0 = 2000 WEEK 35 LINE H
TO-247AC package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 07/04
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9


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